#!/usr/bin/python
# -*- coding: utf-8 -*-

DENALI_CTL_000_DATA = 0x00000400	# VERSION:RD:16:16:=0x0000 DRAM_CLASS:RW:8:4:=0x04 START:RW:0:1:=0x00
DENALI_CTL_001_DATA = 0x00000000	# READ_DATA_FIFO_DEPTH:RD:24:8:=0x00 MAX_CS_REG:RD:16:2:=0x00 MAX_COL_REG:RD:8:4:=0x00 MAX_ROW_REG:RD:0:4:=0x00
DENALI_CTL_002_DATA = 0x00000000	# MEMCD_RMODW_FIFO_DEPTH:RD:24:8:=0x00 WRITE_DATA_FIFO_PTR_WIDTH:RD:16:8:=0x00 WRITE_DATA_FIFO_DEPTH:RD:8:8:=0x00 READ_DATA_FIFO_PTR_WIDTH:RD:0:8:=0x00
DENALI_CTL_003_DATA = 0x00000000	# AXI0_RDFIFO_LOG2_DEPTH:RD:24:8:=0x00 AXI0_CMDFIFO_LOG2_DEPTH:RD:16:8:=0x00 ASYNC_CDC_STAGES:RD:8:8:=0x00 MEMCD_RMODW_FIFO_PTR_WIDTH:RD:0:8:=0x00
DENALI_CTL_004_DATA = 0x00000000	# AXI1_CMDFIFO_LOG2_DEPTH:RD:24:8:=0x00 AXI0_WRCMD_PROC_FIFO_LOG2_DEPTH:RD:16:8:=0x00 AXI0_TRANS_WRFIFO_LOG2_DEPTH:RD:8:8:=0x00 AXI0_WRFIFO_LOG2_DEPTH:RD:0:8:=0x00
DENALI_CTL_005_DATA = 0x00000000	# AXI1_WRCMD_PROC_FIFO_LOG2_DEPTH:RD:24:8:=0x00 AXI1_TRANS_WRFIFO_LOG2_DEPTH:RD:16:8:=0x00 AXI1_WRFIFO_LOG2_DEPTH:RD:8:8:=0x00 AXI1_RDFIFO_LOG2_DEPTH:RD:0:8:=0x00
DENALI_CTL_006_DATA = 0x0000D056	# TINIT:RW:0:24:=0x00d056
DENALI_CTL_007_DATA = 0x00000036	# TRST_PWRON:RW:0:32:=0x00000036
DENALI_CTL_008_DATA = 0x00000086	# CKE_INACTIVE:RW:0:32:=0x00000086
DENALI_CTL_009_DATA = 0x00006B02	# TCPD:RW:8:16:=0x006b INITAREF:RW:0:4:=0x02
DENALI_CTL_010_DATA = 0x080000C8	# CASLAT_LIN:RW:24:6:=0x08 NO_CMD_INIT:RW:16:1:=0x00 TDLL:RW:0:16:=0x00c8
DENALI_CTL_011_DATA = 0x02040003	# TCCD:RW:24:5:=0x02 TBST_INT_INTERVAL:RW:16:3:=0x04 ADDITIVE_LAT:RW:8:5:=0x00 WRLAT:RW:0:5:=0x03
DENALI_CTL_012_DATA = 0x020B0F03	# TWTR:RW:24:6:=0x02 TRAS_MIN:RW:16:8:=0x0b TRC:RW:8:8:=0x0f TRRD:RW:0:8:=0x03
DENALI_CTL_013_DATA = 0x02020C04	# TMRD:RW:24:8:=0x02 TRTP:RW:16:8:=0x02 TFAW:RW:8:8:=0x0c TRP:RW:0:8:=0x04
DENALI_CTL_014_DATA = 0x0048EA04	# TRAS_MAX:RW:8:17:=0x0048ea TMOD:RW:0:8:=0x04
DENALI_CTL_015_DATA = 0x04000303	# TRCD:RW:24:8:=0x04 WRITEINTERP:RW:16:1:=0x00 TCKESR:RW:8:8:=0x03 TCKE:RW:0:3:=0x03
DENALI_CTL_016_DATA = 0x01010004	# TRAS_LOCKOUT:RW:24:1:=0x01 CONCURRENTAP:RW:16:1:=0x01 AP:RW:8:1:=0x00 TWR:RW:0:6:=0x04
DENALI_CTL_017_DATA = 0x00050208	# REG_DIMM_ENABLE:RW:24:1:=0x00 TRP_AB:RW:16:8:=0x05 BSTLEN:RW_D:8:3:=0x02 TDAL:RW:0:8:=0x08
DENALI_CTL_018_DATA = 0x00010100	# RESERVED:RW:24:1:=0x00 RESERVED:RW:16:1:=0x01 OPTIMAL_RMODW_EN:RW:8:1:=0x01 ADDRESS_MIRRORING:RW:0:2:=0x00
DENALI_CTL_019_DATA = 0x00010000	# TREF_ENABLE:RW:16:1:=0x01 RESERVED:RW:8:1:=0x00 AREFRESH:WR:0:1:=0x00
DENALI_CTL_020_DATA = 0x081B0022	# TREF:RW:16:14:=0x081b TRFC:RW:0:10:=0x0022
DENALI_CTL_021_DATA = 0x00000200	# TPDEX:RW:8:16:=0x0002
DENALI_CTL_022_DATA = 0x0002000A	# TXARD:RW:16:16:=0x0002 TXPDLL:RW:0:16:=0x000a
DENALI_CTL_023_DATA = 0x00C80008	# TXSR:RW:16:16:=0x00c8 TXARDS:RW:0:16:=0x0008
DENALI_CTL_024_DATA = 0x00000025	# SREFRESH_EXIT_NO_REFRESH:RW:24:1:=0x00 PWRUP_SREFRESH_EXIT:RW:16:1:=0x00 TXSNR:RW:0:16:=0x0025
DENALI_CTL_025_DATA = 0x03000001	# CKSRE:RW:24:8:=0x03 LOWPOWER_REFRESH_ENABLE:RW:16:2:=0x00 CKE_DELAY:RW:8:3:=0x00 ENABLE_QUICK_SREFRESH:RW:0:1:=0x01
DENALI_CTL_026_DATA = 0x02000003	# LPI_SR_WAKEUP:RW:24:4:=0x02 LPI_PD_WAKEUP:RW:16:4:=0x00 LP_CMD:WR:8:8:=0x00 CKSRX:RW:0:8:=0x03
DENALI_CTL_027_DATA = 0x001F0403	# LPI_WAKEUP_EN:RW:16:5:=0x1f LPI_TIMER_WAKEUP:RW:8:4:=0x04 LPI_SR_MCCLK_GATE_WAKEUP:RW:0:4:=0x03
DENALI_CTL_028_DATA = 0x00040003	# LPI_WAKEUP_TIMEOUT:RW:16:12:=0x0004 LPI_TIMER_COUNT:RW:0:12:=0x0003
DENALI_CTL_029_DATA = 0x00000007	# LP_AUTO_ENTRY_EN:RW:24:3:=0x00 LP_ARB_STATE:RD:16:4:=0x00 LP_STATE:RD:8:6:=0x00 TDFI_LP_RESP:RW:0:3:=0x07
DENALI_CTL_030_DATA = 0x00000000	# LP_AUTO_PD_IDLE:RW:16:12:=0x0000 LP_AUTO_MEM_GATE_EN:RW:8:2:=0x00 LP_AUTO_EXIT_EN:RW:0:3:=0x00
DENALI_CTL_031_DATA = 0x00000000	# RESERVED:RW:16:7:=0x00 LP_AUTO_SR_MC_GATE_IDLE:RW:8:8:=0x00 LP_AUTO_SR_IDLE:RW:0:8:=0x00
DENALI_CTL_032_DATA = 0x00000000	# WRITE_MODEREG:RW+:0:27:=0x00000000
DENALI_CTL_033_DATA = 0x00064200	# MR0_DATA_0:RW:8:15:=0x0642 MRW_STATUS:RD:0:8:=0x00
DENALI_CTL_034_DATA = 0x00000004	# MR2_DATA_0:RW:16:15:=0x0000 MR1_DATA_0:RW:0:15:=0x0004
DENALI_CTL_035_DATA = 0x00000000	# MR3_DATA_0:RW:16:15:=0x0000 MRSINGLE_DATA_0:RW:0:15:=0x0000
DENALI_CTL_036_DATA = 0x00040642	# MR1_DATA_1:RW:16:15:=0x0004 MR0_DATA_1:RW:0:15:=0x0642
DENALI_CTL_037_DATA = 0x00000000	# MRSINGLE_DATA_1:RW:16:15:=0x0000 MR2_DATA_1:RW:0:15:=0x0000
DENALI_CTL_038_DATA = 0x00000000	# BIST_RESULT:RD:24:2:=0x00 BIST_GO:WR:16:1:=0x00 MR3_DATA_1:RW:0:15:=0x0000
DENALI_CTL_039_DATA = 0x00010100	# BIST_ADDR_CHECK:RW:16:1:=0x01 BIST_DATA_CHECK:RW:8:1:=0x01 ADDR_SPACE:RW:0:6:=0x00
DENALI_CTL_040_DATA = 0x00000000	# BIST_START_ADDRESS:RW:0:33:=0x00000000
DENALI_CTL_041_DATA = 0x00000000	# BIST_START_ADDRESS:RW:0:33:=0x00
DENALI_CTL_042_DATA = 0x00000000	# BIST_DATA_MASK:RW:0:32:=0x00000000
DENALI_CTL_043_DATA = 0x00000000
DENALI_CTL_044_DATA = 0x00000000	# ECC_DISABLE_W_UC_ERR:RW:0:1:=0x00
DENALI_CTL_045_DATA = 0x00000000	# ECC_U_ADDR:RD:0:33:=0x00000000
DENALI_CTL_046_DATA = 0x00000000	# ECC_U_SYND:RD:8:8:=0x00 ECC_U_ADDR:RD:0:33:=0x00
DENALI_CTL_047_DATA = 0x00000000	# ECC_U_DATA:RD:0:64:=0x00000000
DENALI_CTL_048_DATA = 0x00000000	# ECC_U_DATA:RD:0:64:=0x00000000
DENALI_CTL_049_DATA = 0x00000000	# ECC_C_ADDR:RD:0:33:=0x00000000
DENALI_CTL_050_DATA = 0x00000000	# ECC_C_SYND:RD:8:8:=0x00 ECC_C_ADDR:RD:0:33:=0x00
DENALI_CTL_051_DATA = 0x00000000	# ECC_C_DATA:RD:0:64:=0x00000000
DENALI_CTL_052_DATA = 0x00000000	# ECC_C_DATA:RD:0:64:=0x00000000
DENALI_CTL_053_DATA = 0x00000000	# ECC_C_ID:RD:16:10:=0x0000 ECC_U_ID:RD:0:10:=0x0000
DENALI_CTL_054_DATA = 0x00020000	# ZQINIT:RW_D:8:12:=0x0200 LONG_COUNT_MASK:RW:0:5:=0x00
DENALI_CTL_055_DATA = 0x00400100	# ZQCS:RW:16:12:=0x0040 ZQCL:RW:0:12:=0x0100
DENALI_CTL_056_DATA = 0x00000200	# ZQ_ON_SREF_EXIT:RW:8:2:=0x02 ZQ_REQ:WR:0:2:=0x00
DENALI_CTL_057_DATA = 0x00000040	# ZQ_INTERVAL:RW:0:32:=0x00000040
DENALI_CTL_058_DATA = 0x02000100	# ROW_DIFF:RW:24:3:=0x02 BANK_DIFF:RW:16:2:=0x00 ZQCS_ROTATE:RW:8:1:=0x01 ZQ_IN_PROGRESS:RD:0:1:=0x00
DENALI_CTL_059_DATA = 0x0A000002	# APREBIT:RW_D:24:4:=0x0a RESERVED:RW:16:1:=0x00 RESERVED:RW:8:5:=0x00 COL_DIFF:RW:0:4:=0x02
DENALI_CTL_060_DATA = 0x0101FFFF	# RESERVED:RW:24:1:=0x01 ADDR_CMP_EN:RW:16:1:=0x01 COMMAND_AGE_COUNT:RW:8:8:=0xff AGE_COUNT:RW:0:8:=0xff
DENALI_CTL_061_DATA = 0x01010101	# RW_SAME_EN:RW:24:1:=0x01 PRIORITY_EN:RW:16:1:=0x01 PLACEMENT_EN:RW:8:1:=0x01 BANK_SPLIT_EN:RW:0:1:=0x01
DENALI_CTL_062_DATA = 0x01010101	# DISABLE_RW_GROUP_W_BNK_CONFLICT:RW:24:2:=0x01 W2R_SPLIT_EN:RW:16:1:=0x01 CS_SAME_EN:RW:8:1:=0x01 RW_SAME_PAGE_EN:RW:0:1:=0x01
DENALI_CTL_063_DATA = 0x00000103	# INHIBIT_DRAM_CMD:RW:24:1:=0x00 DISABLE_RD_INTERLEAVE:RW:16:1:=0x00 SWAP_EN:RW:8:1:=0x01 NUM_Q_ENTRIES_ACT_DISABLE:RW:0:3:=0x03
DENALI_CTL_064_DATA = 0x00000C03	# Q_FULLNESS:RW:24:3:=0x00 REDUC:RW:16:1:=0x00 BURST_ON_FLY_BIT:RW:8:4:=0x0c CS_MAP:RW:0:2:=0x03
DENALI_CTL_065_DATA = 0x01000000	# CTRLUPD_REQ_PER_AREF_EN:RW:24:1:=0x01 CTRLUPD_REQ:WR:16:1:=0x00 CONTROLLER_BUSY:RD:8:1:=0x00 IN_ORDER_ACCEPT:RW:0:1:=0x00
DENALI_CTL_066_DATA = 0x00000000	# INT_STATUS:RD:0:27:=0x00000000
DENALI_CTL_067_DATA = 0x00000000	# INT_ACK:WR:0:26:=0x00000000
DENALI_CTL_068_DATA = 0x00000000	# INT_MASK:RW:0:27:=0x00000000
DENALI_CTL_069_DATA = 0x00000000	# OUT_OF_RANGE_ADDR:RD:0:33:=0x00000000
DENALI_CTL_070_DATA = 0x00000000	# OUT_OF_RANGE_TYPE:RD:16:7:=0x00 OUT_OF_RANGE_LENGTH:RD:8:6:=0x00 OUT_OF_RANGE_ADDR:RD:0:33:=0x00
DENALI_CTL_071_DATA = 0x00000000	# OUT_OF_RANGE_SOURCE_ID:RD:0:10:=0x0000
DENALI_CTL_072_DATA = 0x00000000	# BIST_EXP_DATA:RD:0:64:=0x00000000
DENALI_CTL_073_DATA = 0x00000000	# BIST_EXP_DATA:RD:0:64:=0x00000000
DENALI_CTL_074_DATA = 0x00000000	# BIST_FAIL_DATA:RD:0:64:=0x00000000
DENALI_CTL_075_DATA = 0x00000000	# BIST_FAIL_DATA:RD:0:64:=0x00000000
DENALI_CTL_076_DATA = 0x00000000	# BIST_FAIL_ADDR:RD:0:33:=0x00000000
DENALI_CTL_077_DATA = 0x00000000	# BIST_FAIL_ADDR:RD:0:33:=0x00
DENALI_CTL_078_DATA = 0x00000000	# PORT_CMD_ERROR_ADDR:RD:0:33:=0x00000000
DENALI_CTL_079_DATA = 0x00000000	# PORT_CMD_ERROR_TYPE:RD:24:2:=0x00 PORT_CMD_ERROR_ID:RD:8:10:=0x0000 PORT_CMD_ERROR_ADDR:RD:0:33:=0x00
DENALI_CTL_080_DATA = 0x02020101	# ODT_WR_MAP_CS1:RW:24:2:=0x02 ODT_RD_MAP_CS1:RW:16:2:=0x02 ODT_WR_MAP_CS0:RW:8:2:=0x01 ODT_RD_MAP_CS0:RW:0:2:=0x01
DENALI_CTL_081_DATA = 0x01030303	# ODT_EN:RW:24:1:=0x01 TODTH_RD:RW:16:4:=0x03 TODTH_WR:RW:8:4:=0x03 TODTL_2CMD:RW:0:8:=0x03
DENALI_CTL_082_DATA = 0x02020100	# R2W_DIFFCS_DLY:RW_D:24:5:=0x02 R2R_DIFFCS_DLY:RW_D:16:5:=0x02 RD_TO_ODTH:RW:8:7:=0x01 WR_TO_ODTH:RW:0:7:=0x00
DENALI_CTL_083_DATA = 0x02000202	# R2W_SAMECS_DLY:RW_D:24:5:=0x02 R2R_SAMECS_DLY:RW:16:5:=0x00 W2W_DIFFCS_DLY:RW_D:8:5:=0x02 W2R_DIFFCS_DLY:RW_D:0:5:=0x02
DENALI_CTL_084_DATA = 0x00000000	# OCD_ADJUST_PUP_CS_0:RW:24:5:=0x00 OCD_ADJUST_PDN_CS_0:RW:16:5:=0x00 W2W_SAMECS_DLY:RW:8:5:=0x00 W2R_SAMECS_DLY:RW:0:5:=0x00
DENALI_CTL_085_DATA = 0x00000000	# SWLVL_EXIT:WR:24:1:=0x00 SWLVL_START:WR:16:1:=0x00 SWLVL_LOAD:WR:8:1:=0x00 SW_LEVELING_MODE:RW:0:3:=0x00
DENALI_CTL_086_DATA = 0x00000000	# SWLVL_RESP_1:RD:24:8:=0x00 SWLVL_RESP_0:RD:16:8:=0x00 LVL_STATUS:RD:8:4:=0x00 SWLVL_OP_DONE:RD:0:1:=0x00
DENALI_CTL_087_DATA = 0x00000000	# WRLVL_REQ:WR:24:1:=0x00 SWLVL_RESP_4:RD:16:8:=0x00 SWLVL_RESP_3:RD:8:8:=0x00 SWLVL_RESP_2:RD:0:8:=0x00
DENALI_CTL_088_DATA = 0x00281A00	# WRLVL_EN:RW:24:1:=0x00 WLMRD:RW:16:6:=0x28 WLDQSEN:RW:8:6:=0x1a WRLVL_CS:RW:0:1:=0x00
DENALI_CTL_089_DATA = 0x00000000	# RESERVED:RW:16:5:=0x00 WRLVL_INTERVAL:RW:0:16:=0x0000
DENALI_CTL_090_DATA = 0x00010000
DENALI_CTL_091_DATA = 0x00220022
DENALI_CTL_092_DATA = 0x00220022
DENALI_CTL_093_DATA = 0x00000022
DENALI_CTL_094_DATA = 0x00000000	# RDLVL_REG_EN:RW:24:1:=0x00 RDLVL_BEGIN_DELAY_EN:RW:16:1:=0x00 RDLVL_EDGE:RW:8:1:=0x00 RDLVL_CS:RW:0:1:=0x00
DENALI_CTL_095_DATA = 0x00000000	# RDLVL_BEGIN_DELAY_0:RD:8:16:=0x0000 RDLVL_GATE_REG_EN:RW:0:1:=0x00
DENALI_CTL_096_DATA = 0x00000000	# RDLVL_MIDPOINT_DELAY_0:RD:16:16:=0x0000 RDLVL_END_DELAY_0:RD:0:16:=0x0000
DENALI_CTL_097_DATA = 0x00000000	# RDLVL_OFFSET_DIR_0:RW:16:1:=0x00 RDLVL_OFFSET_DELAY_0:RW:0:16:=0x0000
DENALI_CTL_098_DATA = 0x00000000
DENALI_CTL_099_DATA = 0x00000000	# RDLVL_END_DELAY_1:RD:16:16:=0x0000 RDLVL_BEGIN_DELAY_1:RD:0:16:=0x0000
DENALI_CTL_100_DATA = 0x00000000	# RDLVL_OFFSET_DELAY_1:RW:16:16:=0x0000 RDLVL_MIDPOINT_DELAY_1:RD:0:16:=0x0000
DENALI_CTL_101_DATA = 0x00000000
DENALI_CTL_102_DATA = 0x00000000	# RDLVL_BEGIN_DELAY_2:RD:16:16:=0x0000 RDLVL_GATE_DELAY_1:RW+:0:16:=0x0000
DENALI_CTL_103_DATA = 0x00000000	# RDLVL_MIDPOINT_DELAY_2:RD:16:16:=0x0000 RDLVL_END_DELAY_2:RD:0:16:=0x0000
DENALI_CTL_104_DATA = 0x00000000	# RDLVL_OFFSET_DIR_2:RW:16:1:=0x00 RDLVL_OFFSET_DELAY_2:RW:0:16:=0x0000
DENALI_CTL_105_DATA = 0x00002020	# RDLVL_GATE_DELAY_2:RW+:16:16:=0x0000 RDLVL_DELAY_2:RW:0:16:=0x4040
DENALI_CTL_106_DATA = 0x00000000	# RDLVL_END_DELAY_3:RD:16:16:=0x0000 RDLVL_BEGIN_DELAY_3:RD:0:16:=0x0000
DENALI_CTL_107_DATA = 0x00000000	# RDLVL_OFFSET_DELAY_3:RW:16:16:=0x0000 RDLVL_MIDPOINT_DELAY_3:RD:0:16:=0x0000
DENALI_CTL_108_DATA = 0x00000000
DENALI_CTL_109_DATA = 0x00000000	# RDLVL_BEGIN_DELAY_4:RD:16:16:=0x0000 RDLVL_GATE_DELAY_3:RW+:0:16:=0x0000
DENALI_CTL_110_DATA = 0x00000000	# RDLVL_MIDPOINT_DELAY_4:RD:16:16:=0x0000 RDLVL_END_DELAY_4:RD:0:16:=0x0000
DENALI_CTL_111_DATA = 0x00000000	# RDLVL_OFFSET_DIR_4:RW:16:1:=0x00 RDLVL_OFFSET_DELAY_4:RW:0:16:=0x0000
DENALI_CTL_112_DATA = 0x00000000
DENALI_CTL_113_DATA = 0x0F0F0F0F	# AHB1_RDLEN:RW:24:4:=0x0f AHB1_WRLEN:RW:16:4:=0x0f AHB0_RDLEN:RW:8:4:=0x0f AHB0_WRLEN:RW:0:4:=0x0f
DENALI_CTL_114_DATA = 0x00010100	# AXI0_FIFO_TYPE_REG:RW:24:2:=0x00 AXI0_W_PRIORITY:RW:16:2:=0x01 AXI0_R_PRIORITY:RW:8:2:=0x01 AXI0_ALL_STROBES_USED_ENABLE:RW:0:1:=0x00
DENALI_CTL_115_DATA = 0x00010100	# AXI1_FIFO_TYPE_REG:RW:24:2:=0x00 AXI1_W_PRIORITY:RW:16:2:=0x01 AXI1_R_PRIORITY:RW:8:2:=0x01 AXI1_ALL_STROBES_USED_ENABLE:RW:0:1:=0x00
DENALI_CTL_116_DATA = 0x00016403	# AXI0_CURRENT_BDW:RD:24:7:=0x00 AXI0_BDW_OVFLOW:RW:16:1:=0x01 AXI0_BDW:RW:8:7:=0x64 ARB_CMD_Q_THRESHOLD:RW:0:3:=0x03
DENALI_CTL_117_DATA = 0x00000164	# CKE_STATUS:RD:24:2:=0x00 AXI1_CURRENT_BDW:RD:16:7:=0x00 AXI1_BDW_OVFLOW:RW:8:1:=0x01 AXI1_BDW:RW:0:7:=0x64
DENALI_CTL_118_DATA = 0x00000000	# DLL_RST_ADJ_DLY:RW:24:8:=0x00 DLL_RST_DELAY:RW:8:16:=0x0000 MEM_RST_VALID:RD:0:1:=0x00
DENALI_CTL_119_DATA = 0x000A0000	# TDFI_RDDATA_EN:RD:24:6:=0x00 TDFI_PHY_RDLAT:RW_D:16:6:=0x0a UPDATE_ERROR_STATUS:RD:8:7:=0x00 TDFI_PHY_WRLAT:RD:0:6:=0x00
DENALI_CTL_120_DATA = 0x10360500	# TDFI_CTRLUPD_MAX:RW:16:14:=0x1036 TDFI_CTRLUPD_MIN:RW:8:4:=0x05 DRAM_CLK_DISABLE:RW:0:2:=0x00
DENALI_CTL_121_DATA = 0x02000200	# TDFI_PHYUPD_TYPE1:RW:16:16:=0x0200 TDFI_PHYUPD_TYPE0:RW:0:16:=0x0200
DENALI_CTL_122_DATA = 0x02000200	# TDFI_PHYUPD_TYPE3:RW:16:16:=0x0200 TDFI_PHYUPD_TYPE2:RW:0:16:=0x0200
DENALI_CTL_123_DATA = 0x00001036	# TDFI_PHYUPD_RESP:RW:0:14:=0x1036
DENALI_CTL_124_DATA = 0x0000A21C	# TDFI_CTRLUPD_INTERVAL:RW:0:32:=0x0000a21c
DENALI_CTL_125_DATA = 0x01020303	# TDFI_DRAM_CLK_DISABLE:RW:24:4:=0x01 TDFI_CTRL_DELAY:RW_D:16:4:=0x02 WRLAT_ADJ:RW:8:6:=0x03 RDLAT_ADJ:RW:0:6:=0x03
DENALI_CTL_126_DATA = 0x00170A03	# TDFI_WRLVL_WW:RW:16:10:=0x0017 TDFI_WRLVL_EN:RW:8:8:=0x0a TDFI_DRAM_CLK_ENABLE:RW:0:4:=0x03
DENALI_CTL_127_DATA = 0x00000000	# TDFI_WRLVL_RESP:RW:0:32:=0x00000000
DENALI_CTL_128_DATA = 0x00000000	# TDFI_WRLVL_MAX:RW:0:32:=0x00000000
DENALI_CTL_129_DATA = 0x04038000	# TDFI_WRLVL_RESPLAT:RW:24:8:=0x04 TDFI_WRLVL_DLL:RW:16:8:=0x03 DFI_WRLVL_MAX_DELAY:RW:0:16:=0x8000
DENALI_CTL_130_DATA = 0x070B0A07	# TDFI_RDLVL_LOAD:RW:24:8:=0x07 TDFI_RDLVL_DLL:RW:16:8:=0x0b TDFI_RDLVL_EN:RW:8:8:=0x0a TDFI_WRLVL_LOAD:RW:0:8:=0x07
DENALI_CTL_131_DATA = 0x00FFFF16	# RDLVL_MAX_DELAY:RW:8:16:=0xffff TDFI_RDLVL_RESPLAT:RW:0:8:=0x16
DENALI_CTL_132_DATA = 0x00190010	# TDFI_RDLVL_RR:RW:16:10:=0x0019 RDLVL_GATE_MAX_DELAY:RW:0:16:=0x0010
DENALI_CTL_133_DATA = 0x00000000	# TDFI_RDLVL_RESP:RW:0:32:=0x00000000
DENALI_CTL_134_DATA = 0x00000000	# RDLVL_RESP_MASK:RW:0:36:=0x00000000
DENALI_CTL_135_DATA = 0x00000000	# RDLVL_RESP_MASK:RW:0:36:=0x00
DENALI_CTL_136_DATA = 0x00000000	# RDLVL_GATE_RESP_MASK:RW:0:36:=0x00000000
DENALI_CTL_137_DATA = 0x00000000	# RDLVL_GATE_PREAMBLE_CHECK_EN:RW:24:1:=0x00 RDLVL_GATE_EN:RW:16:1:=0x00 RDLVL_EN:RW:8:1:=0x00 RDLVL_GATE_RESP_MASK:RW:0:36:=0x00
DENALI_CTL_138_DATA = 0x00000000	# TDFI_RDLVL_MAX:RW:0:32:=0x00000000
DENALI_CTL_139_DATA = 0x00000204	# RDLVL_GATE_DQ_ZERO_COUNT:RW:8:4:=0x02 RDLVL_DQ_ZERO_COUNT:RW:0:4:=0x04
DENALI_CTL_140_DATA = 0x00000000	# RDLVL_ERROR_STATUS:RD:0:22:=0x000000
DENALI_CTL_141_DATA = 0x00000000	# RDLVL_GATE_INTERVAL:RW:16:16:=0x0000 RDLVL_INTERVAL:RW:0:16:=0x0000
DENALI_CTL_142_DATA = 0x00000001	# TDFI_PHY_WRDATA:RW:8:3:=0x00 ODT_ALT_EN:RW:0:1:=0x01

DENALI_PHY_000_DATA = 0x00000413	# DEN_PHY_DQ_TIMING_REG_0:RW:0:32:=0x00000413
DENALI_PHY_001_DATA = 0x00000415	# DEN_PHY_DQS_TIMING_REG_0:RW:0:32:=0x00000415
DENALI_PHY_002_DATA = 0x00010088	# DEN_PHY_GATE_LPBK_CTRL_REG_0:RW:0:32:=0x00010088
DENALI_PHY_003_DATA = 0x00000004	# DEN_PHY_READ_CTRL_REG_0:RW:0:32:=0x00000004
DENALI_PHY_004_DATA = 0x0A120036	# PHY_DLL_MASTER_CTRL_REG_0:RW:0:32:=0x0a120036
DENALI_PHY_005_DATA = 0x40404040	# PHY_DLL_SLAVE_CTRL_REG_0:RW:0:32:=0x40404040
DENALI_PHY_006_DATA = 0x00004921	# DEN_PHY_IE_TIMING_REG_0:RW:0:32:=0x00004921
DENALI_PHY_007_DATA = 0x00000000	# DEN_PHY_OBS_REG_0_0:RD:0:32:=0x00000000
DENALI_PHY_008_DATA = 0x00000000	# PHY_DLL_OBS_REG_0_0:RD:0:32:=0x00000000
DENALI_PHY_009_DATA = 0x00000000	# PHY_DLL_OBS_REG_1_0:RD:0:32:=0x00000000
DENALI_PHY_010_DATA = 0x00000000	# PHY_DLL_OBS_REG_2_0:RD:0:32:=0x00000000
DENALI_PHY_011_DATA = 0x00000000	#
DENALI_PHY_012_DATA = 0x00000000	#
DENALI_PHY_013_DATA = 0x00000000	#
DENALI_PHY_014_DATA = 0x00000000	#
DENALI_PHY_015_DATA = 0x00000000	#
DENALI_PHY_016_DATA = 0x00000413	# DEN_PHY_DQ_TIMING_REG_1:RW:0:32:=0x00000413
DENALI_PHY_017_DATA = 0x00000415	# DEN_PHY_DQS_TIMING_REG_1:RW:0:32:=0x00000415
DENALI_PHY_018_DATA = 0x00010088	# DEN_PHY_GATE_LPBK_CTRL_REG_1:RW:0:32:=0x00010088
DENALI_PHY_019_DATA = 0x00000004	# DEN_PHY_READ_CTRL_REG_1:RW:0:32:=0x00000004
DENALI_PHY_020_DATA = 0x0A120036	# PHY_DLL_MASTER_CTRL_REG_1:RW:0:32:=0x0a120036
DENALI_PHY_021_DATA = 0x40404040	# PHY_DLL_SLAVE_CTRL_REG_1:RW:0:32:=0x40404040
DENALI_PHY_022_DATA = 0x00004921	# DEN_PHY_IE_TIMING_REG_1:RW:0:32:=0x00004921
DENALI_PHY_023_DATA = 0x00000000	# DEN_PHY_OBS_REG_0_1:RD:0:32:=0x00000000
DENALI_PHY_024_DATA = 0x00000000	# PHY_DLL_OBS_REG_0_1:RD:0:32:=0x00000000
DENALI_PHY_025_DATA = 0x00000000	# PHY_DLL_OBS_REG_1_1:RD:0:32:=0x00000000
DENALI_PHY_026_DATA = 0x00000000	# PHY_DLL_OBS_REG_2_1:RD:0:32:=0x00000000
DENALI_PHY_027_DATA = 0x00000000	#
DENALI_PHY_028_DATA = 0x00000000	#
DENALI_PHY_029_DATA = 0x00000000	#
DENALI_PHY_030_DATA = 0x00000000	#
DENALI_PHY_031_DATA = 0x00000000	#
DENALI_PHY_032_DATA = 0x00000413	# DEN_PHY_DQ_TIMING_REG_2:RW:0:32:=0x00000413
DENALI_PHY_033_DATA = 0x00000415	# DEN_PHY_DQS_TIMING_REG_2:RW:0:32:=0x00000415
DENALI_PHY_034_DATA = 0x00010088	# DEN_PHY_GATE_LPBK_CTRL_REG_2:RW:0:32:=0x00010088
DENALI_PHY_035_DATA = 0x00000004	# DEN_PHY_READ_CTRL_REG_2:RW:0:32:=0x00000004
DENALI_PHY_036_DATA = 0x0A120036	# PHY_DLL_MASTER_CTRL_REG_2:RW:0:32:=0x0a120036
DENALI_PHY_037_DATA = 0x40404040	# PHY_DLL_SLAVE_CTRL_REG_2:RW:0:32:=0x40404040
DENALI_PHY_038_DATA = 0x00004921	# DEN_PHY_IE_TIMING_REG_2:RW:0:32:=0x00004921
DENALI_PHY_039_DATA = 0x00000000	# DEN_PHY_OBS_REG_0_2:RD:0:32:=0x00000000
DENALI_PHY_040_DATA = 0x00000000	# PHY_DLL_OBS_REG_0_2:RD:0:32:=0x00000000
DENALI_PHY_041_DATA = 0x00000000	# PHY_DLL_OBS_REG_1_2:RD:0:32:=0x00000000
DENALI_PHY_042_DATA = 0x00000000	# PHY_DLL_OBS_REG_2_2:RD:0:32:=0x00000000
DENALI_PHY_043_DATA = 0x00000000	#
DENALI_PHY_044_DATA = 0x00000000	#
DENALI_PHY_045_DATA = 0x00000000	#
DENALI_PHY_046_DATA = 0x00000000	#
DENALI_PHY_047_DATA = 0x00000000	#
DENALI_PHY_048_DATA = 0x00000413	# DEN_PHY_DQ_TIMING_REG_3:RW:0:32:=0x00000413
DENALI_PHY_049_DATA = 0x00000415	# DEN_PHY_DQS_TIMING_REG_3:RW:0:32:=0x00000415
DENALI_PHY_050_DATA = 0x00010088	# DEN_PHY_GATE_LPBK_CTRL_REG_3:RW:0:32:=0x00010088
DENALI_PHY_051_DATA = 0x00000004	# DEN_PHY_READ_CTRL_REG_3:RW:0:32:=0x00000004
DENALI_PHY_052_DATA = 0x0A120036	# PHY_DLL_MASTER_CTRL_REG_3:RW:0:32:=0x0a120036
DENALI_PHY_053_DATA = 0x40404040	# PHY_DLL_SLAVE_CTRL_REG_3:RW:0:32:=0x40404040
DENALI_PHY_054_DATA = 0x00004921	# DEN_PHY_IE_TIMING_REG_3:RW:0:32:=0x00004921
DENALI_PHY_055_DATA = 0x00000000	# DEN_PHY_OBS_REG_0_3:RD:0:32:=0x00000000
DENALI_PHY_056_DATA = 0x00000000	# PHY_DLL_OBS_REG_0_3:RD:0:32:=0x00000000
DENALI_PHY_057_DATA = 0x00000000	# PHY_DLL_OBS_REG_1_3:RD:0:32:=0x00000000
DENALI_PHY_058_DATA = 0x00000000	# PHY_DLL_OBS_REG_2_3:RD:0:32:=0x00000000
DENALI_PHY_059_DATA = 0x00000000	#
DENALI_PHY_060_DATA = 0x00000000	#
DENALI_PHY_061_DATA = 0x00000000	#
DENALI_PHY_062_DATA = 0x00000000	#
DENALI_PHY_063_DATA = 0x00000000	#
DENALI_PHY_064_DATA = 0x00000413	# DEN_PHY_DQ_TIMING_REG_4:RW:0:32:=0x00000413
DENALI_PHY_065_DATA = 0x00000415	# DEN_PHY_DQS_TIMING_REG_4:RW:0:32:=0x00000415
DENALI_PHY_066_DATA = 0x00010088	# DEN_PHY_GATE_LPBK_CTRL_REG_4:RW:0:32:=0x00010088
DENALI_PHY_067_DATA = 0x00000004	# DEN_PHY_READ_CTRL_REG_4:RW:0:32:=0x00000004
DENALI_PHY_068_DATA = 0x0A120036	# PHY_DLL_MASTER_CTRL_REG_4:RW:0:32:=0x0a120036
DENALI_PHY_069_DATA = 0x40404040	# PHY_DLL_SLAVE_CTRL_REG_4:RW:0:32:=0x40404040
DENALI_PHY_070_DATA = 0x00004921	# DEN_PHY_IE_TIMING_REG_4:RW:0:32:=0x00004921
DENALI_PHY_071_DATA = 0x00000000	# DEN_PHY_OBS_REG_0_4:RD:0:32:=0x00000000
DENALI_PHY_072_DATA = 0x00000000	# PHY_DLL_OBS_REG_0_4:RD:0:32:=0x00000000
DENALI_PHY_073_DATA = 0x00000000	# PHY_DLL_OBS_REG_1_4:RD:0:32:=0x00000000
DENALI_PHY_074_DATA = 0x00000000	# PHY_DLL_OBS_REG_2_4:RD:0:32:=0x00000000
DENALI_PHY_075_DATA = 0x00000000	#
DENALI_PHY_076_DATA = 0x00000000	#
DENALI_PHY_077_DATA = 0x00000000	#
DENALI_PHY_078_DATA = 0x00000000	#
DENALI_PHY_079_DATA = 0x00000000	#
DENALI_PHY_080_DATA = 0x00010006	# DEN_PHY_CTRL_REG:RW:0:32:=0x00010006
DENALI_PHY_081_DATA = 0x00000000	# DEN_PHY_LP_WAKEUP_REG:RW:0:32:=0x00000200

#DENALI_PHY_082_DATA = 0x00201004	# DEN_PHY_PAD_TSEL_REG:RW:0:32:=0x00201004
#DENALI_PHY_083_DATA = 0x88048804	# PHY_PAD_DRIVE_REG_0:RW:0:32:=0x88048804
#DENALI_PHY_084_DATA = 0x88048804	# PHY_PAD_DRIVE_REG_1:RW_D+:0:32:=0x88048804
#DENALI_PHY_085_DATA = 0x88048804	# PHY_PAD_DRIVE_REG_2:RW:0:32:=0x88048804
#DENALI_PHY_086_DATA = 0x00040004	# PHY_PAD_TERM_REG_0:RW_D+:0:32:=0x00040004
#DENALI_PHY_087_DATA = 0x00040004	# PHY_PAD_TERM_REG_1:RW_D+:0:32:=0x00040004

#DENALI_PHY_082_DATA = 0x00011249
#DENALI_PHY_083_DATA = 0x00008807
#DENALI_PHY_084_DATA = 0x88078807
#DENALI_PHY_085_DATA = 0x88078805
#DENALI_PHY_086_DATA = 0x00000001
#DENALI_PHY_087_DATA = 0x00000001

DENALI_PHY_082_DATA = 0x00012492
DENALI_PHY_083_DATA = 0x00008804
DENALI_PHY_084_DATA = 0x88048804
DENALI_PHY_085_DATA = 0x88048804
DENALI_PHY_086_DATA = 0x00000002
DENALI_PHY_087_DATA = 0x00000002

BM3823_CTL_GRP0 = [ DENALI_CTL_000_DATA, DENALI_CTL_001_DATA, DENALI_CTL_002_DATA, DENALI_CTL_003_DATA, \
					DENALI_CTL_004_DATA, DENALI_CTL_005_DATA, DENALI_CTL_006_DATA, DENALI_CTL_007_DATA, \
					DENALI_CTL_008_DATA, DENALI_CTL_009_DATA, DENALI_CTL_010_DATA, DENALI_CTL_011_DATA, \
					DENALI_CTL_012_DATA, DENALI_CTL_013_DATA, DENALI_CTL_014_DATA, DENALI_CTL_015_DATA, \
					DENALI_CTL_016_DATA, DENALI_CTL_017_DATA, DENALI_CTL_018_DATA, DENALI_CTL_019_DATA, \
					DENALI_CTL_020_DATA, DENALI_CTL_021_DATA, DENALI_CTL_022_DATA, DENALI_CTL_023_DATA, \
					DENALI_CTL_024_DATA, DENALI_CTL_025_DATA, DENALI_CTL_026_DATA, DENALI_CTL_027_DATA, \
					DENALI_CTL_028_DATA, DENALI_CTL_029_DATA, DENALI_CTL_030_DATA, DENALI_CTL_031_DATA, \
					DENALI_CTL_032_DATA, DENALI_CTL_033_DATA, DENALI_CTL_034_DATA, DENALI_CTL_035_DATA, \
					DENALI_CTL_036_DATA, DENALI_CTL_037_DATA, DENALI_CTL_038_DATA, DENALI_CTL_039_DATA, \
					DENALI_CTL_040_DATA, DENALI_CTL_041_DATA, DENALI_CTL_042_DATA, DENALI_CTL_043_DATA, \
					DENALI_CTL_044_DATA, DENALI_CTL_045_DATA, DENALI_CTL_046_DATA, DENALI_CTL_047_DATA, \
					DENALI_CTL_048_DATA, DENALI_CTL_049_DATA, DENALI_CTL_050_DATA, DENALI_CTL_051_DATA, \
					DENALI_CTL_052_DATA, DENALI_CTL_053_DATA, DENALI_CTL_054_DATA, DENALI_CTL_055_DATA, \
					DENALI_CTL_056_DATA, DENALI_CTL_057_DATA, DENALI_CTL_058_DATA, DENALI_CTL_059_DATA, \
					DENALI_CTL_060_DATA, DENALI_CTL_061_DATA, DENALI_CTL_062_DATA, DENALI_CTL_063_DATA  ]

BM3823_CTL_GRP1 = [ DENALI_CTL_064_DATA, DENALI_CTL_065_DATA, DENALI_CTL_066_DATA, DENALI_CTL_067_DATA, \
					DENALI_CTL_068_DATA, DENALI_CTL_069_DATA, DENALI_CTL_070_DATA, DENALI_CTL_071_DATA, \
					DENALI_CTL_072_DATA, DENALI_CTL_073_DATA, DENALI_CTL_074_DATA, DENALI_CTL_075_DATA, \
					DENALI_CTL_076_DATA, DENALI_CTL_077_DATA, DENALI_CTL_078_DATA, DENALI_CTL_079_DATA, \
					DENALI_CTL_080_DATA, DENALI_CTL_081_DATA, DENALI_CTL_082_DATA, DENALI_CTL_083_DATA, \
					DENALI_CTL_084_DATA, DENALI_CTL_085_DATA, DENALI_CTL_086_DATA, DENALI_CTL_087_DATA, \
					DENALI_CTL_088_DATA, DENALI_CTL_089_DATA, DENALI_CTL_090_DATA, DENALI_CTL_091_DATA, \
					DENALI_CTL_092_DATA, DENALI_CTL_093_DATA, DENALI_CTL_094_DATA, DENALI_CTL_095_DATA, \
					DENALI_CTL_096_DATA, DENALI_CTL_097_DATA, DENALI_CTL_098_DATA, DENALI_CTL_099_DATA, \
					DENALI_CTL_100_DATA, DENALI_CTL_101_DATA, DENALI_CTL_102_DATA, DENALI_CTL_103_DATA, \
					DENALI_CTL_104_DATA, DENALI_CTL_105_DATA, DENALI_CTL_106_DATA, DENALI_CTL_107_DATA, \
					DENALI_CTL_108_DATA, DENALI_CTL_109_DATA, DENALI_CTL_110_DATA, DENALI_CTL_111_DATA, \
					DENALI_CTL_112_DATA, DENALI_CTL_113_DATA, DENALI_CTL_114_DATA, DENALI_CTL_115_DATA, \
					DENALI_CTL_116_DATA, DENALI_CTL_117_DATA, DENALI_CTL_118_DATA, DENALI_CTL_119_DATA, \
					DENALI_CTL_120_DATA, DENALI_CTL_121_DATA, DENALI_CTL_122_DATA, DENALI_CTL_123_DATA, \
					DENALI_CTL_124_DATA, DENALI_CTL_125_DATA, DENALI_CTL_126_DATA, DENALI_CTL_127_DATA  ]

BM3823_CTL_GRP2 = [ DENALI_CTL_128_DATA, DENALI_CTL_129_DATA, DENALI_CTL_130_DATA, DENALI_CTL_131_DATA, \
					DENALI_CTL_132_DATA, DENALI_CTL_133_DATA, DENALI_CTL_134_DATA, DENALI_CTL_135_DATA, \
					DENALI_CTL_136_DATA, DENALI_CTL_137_DATA, DENALI_CTL_138_DATA, DENALI_CTL_139_DATA, \
					DENALI_CTL_140_DATA, DENALI_CTL_141_DATA, DENALI_CTL_142_DATA  ]


BM3823_PHY_GRP0 = [ DENALI_PHY_000_DATA, DENALI_PHY_001_DATA, DENALI_PHY_002_DATA, DENALI_PHY_003_DATA, \
					DENALI_PHY_004_DATA, DENALI_PHY_005_DATA, DENALI_PHY_006_DATA, DENALI_PHY_007_DATA, \
					DENALI_PHY_008_DATA, DENALI_PHY_009_DATA, DENALI_PHY_010_DATA, DENALI_PHY_011_DATA, \
					DENALI_PHY_012_DATA, DENALI_PHY_013_DATA, DENALI_PHY_014_DATA, DENALI_PHY_015_DATA, \
					DENALI_PHY_016_DATA, DENALI_PHY_017_DATA, DENALI_PHY_018_DATA, DENALI_PHY_019_DATA, \
					DENALI_PHY_020_DATA, DENALI_PHY_021_DATA, DENALI_PHY_022_DATA, DENALI_PHY_023_DATA, \
					DENALI_PHY_024_DATA, DENALI_PHY_025_DATA, DENALI_PHY_026_DATA, DENALI_PHY_027_DATA, \
					DENALI_PHY_028_DATA, DENALI_PHY_029_DATA, DENALI_PHY_030_DATA, DENALI_PHY_031_DATA, \
					DENALI_PHY_032_DATA, DENALI_PHY_033_DATA, DENALI_PHY_034_DATA, DENALI_PHY_035_DATA, \
					DENALI_PHY_036_DATA, DENALI_PHY_037_DATA, DENALI_PHY_038_DATA, DENALI_PHY_039_DATA, \
					DENALI_PHY_040_DATA, DENALI_PHY_041_DATA, DENALI_PHY_042_DATA, DENALI_PHY_043_DATA, \
					DENALI_PHY_044_DATA, DENALI_PHY_045_DATA, DENALI_PHY_046_DATA, DENALI_PHY_047_DATA, \
					DENALI_PHY_048_DATA, DENALI_PHY_049_DATA, DENALI_PHY_050_DATA, DENALI_PHY_051_DATA, \
					DENALI_PHY_052_DATA, DENALI_PHY_053_DATA, DENALI_PHY_054_DATA, DENALI_PHY_055_DATA, \
					DENALI_PHY_056_DATA, DENALI_PHY_057_DATA, DENALI_PHY_058_DATA, DENALI_PHY_059_DATA, \
					DENALI_PHY_060_DATA, DENALI_PHY_061_DATA, DENALI_PHY_062_DATA, DENALI_PHY_063_DATA  ]

BM3823_PHY_GRP1 = [ DENALI_PHY_064_DATA, DENALI_PHY_065_DATA, DENALI_PHY_066_DATA, DENALI_PHY_067_DATA, \
					DENALI_PHY_068_DATA, DENALI_PHY_069_DATA, DENALI_PHY_070_DATA, DENALI_PHY_071_DATA, \
					DENALI_PHY_072_DATA, DENALI_PHY_073_DATA, DENALI_PHY_074_DATA, DENALI_PHY_075_DATA, \
					DENALI_PHY_076_DATA, DENALI_PHY_077_DATA, DENALI_PHY_078_DATA, DENALI_PHY_079_DATA, \
					DENALI_PHY_080_DATA, DENALI_PHY_081_DATA  ]

BM3823_PHY_GRP2 = [ DENALI_PHY_082_DATA, DENALI_PHY_083_DATA, DENALI_PHY_084_DATA, DENALI_PHY_085_DATA, \
					DENALI_PHY_086_DATA, DENALI_PHY_087_DATA  ]

BM3823_DDR_CTL_ADDR = 0x88000000
BM3823_DDR_PHY_ADDR = 0x88000400

BM3823_DDR_CTL_000_ADDR  = BM3823_DDR_CTL_ADDR + (0 * 4)
BM3823_DDR_CTL_066_ADDR  = BM3823_DDR_CTL_ADDR + (66 * 4)

BM3823_DDR_CTL_GRP0_ADDR = BM3823_DDR_CTL_ADDR
BM3823_DDR_CTL_GRP1_ADDR = BM3823_DDR_CTL_GRP0_ADDR + (len(BM3823_CTL_GRP0) << 2)
BM3823_DDR_CTL_GRP2_ADDR = BM3823_DDR_CTL_GRP1_ADDR + (len(BM3823_CTL_GRP1) << 2)

BM3823_DDR_PHY_GRP0_ADDR = BM3823_DDR_PHY_ADDR
BM3823_DDR_PHY_GRP1_ADDR = BM3823_DDR_PHY_GRP0_ADDR + (len(BM3823_PHY_GRP0) << 2)
BM3823_DDR_PHY_GRP2_ADDR = BM3823_DDR_PHY_GRP1_ADDR + (len(BM3823_PHY_GRP1) << 2)

